SOM-SMARC-ZU (B71)
Depending on the configuration and following revisions, the board's features are subject to change. For detailed information on hardware specifications, please visit www.seco.com.
SOM-SMARC-ZU is a SMARC® Rel. 2.0 compliant module with the Xilinx® Zynq® Ultrascale+™ MPSoC. Delivering flexibile Arm+FPGA Heterogeneous processing in a standard form factor, this solution is able to merge wide scalability, from cost effective Dual-Core to high performance Quad-Core Arm Cortex®-A53 MPSoCs with GPU/VCU, and extreme flexibility (up to 256k FPGA logic cells).
For ordering purposes, the SOM-SMARC-ZU is referred to by its base code, "B71".
Technical Documents
At the following Links you will find documentations like Manual and Rev. specific documents.
Manual
Datasheet
Product page
Connect to Clea Cloud
Step by step guide to register a Clea OS device and configure endpoints and credentials to enable cloud connectivity and device management.
Documentation
For a complete explanation of Clea OS and detailed installation instructions, refer to the official documentation:
Download Clea OS Images
To quickly get started, download the latest complete prebuild Clea OS images (or other binaries like U-Boot, Linux Kernel, SDKs) from the official release page:
Build Clea OS
The source code for Clea OS can be found at the following Gitlab organization. To build a complete BSP image from source you can check the Get Started pages of the documentation.
Downloads
| Board configuration | Version | Vivado Project | Petalinux build | Filesystem |
|---|---|---|---|---|
| 2CG_2GB | 2020.1 v2.2 | standard-project | - | - |
| 4CG_1GB | 2020.1 v2.2 | standard-project | - | - |
| 4CG_2GB | 2020.1 v2.2 | standard-project | - | - |
| 4EG_2GB | 2020.1 v2.2 | standard-project | - | - |
| 4EV_2GB | 2020.1 v2.2 | standard-project | - | - |
| 5EV_2GB | 2020.1 v2.2 | standard-project | - | - |
| 5EV_4GB | 2020.1 v2.2 | standard-project | - | - |